DAC's Dangerous Undertones
Winds of Change in EDA

The 41st Design Automation Conference in San Diego last week wasn’t a bad conference. In fact, it was quite a good one. According to the program, there were a record number of papers submitted to the technical conference, and the selection panel had to be “more selective than ever” in choosing the elite few that were granted a session at DAC.

As a trade show, however, DAC is telegraphing ominous signals to the industry that supports it. Declining ASIC design starts, increasingly complex technical challenges, and rapidly improving alternative solutions threaten the very fabric of the EDA industry. The question is: is anyone listening? Do the three big EDA companies hear DAC’s whispered warnings that change is in the air? Do they realize that they might not be happy with where the new wind blows them?

There is an ironic gravity to the arrangement of booths on the trade show floor. The three traditional dominant suppliers of EDA tools, Synopsys, Cadence, and Mentor are anchored around the most distant periphery, one at each end and one in the center rear. Three established “spoilers” Magma, Aldec, and Synplicity are positioned at the front near the entrances. Large constellations of innovative startups circulate through the center of the exhibit space seeking stable orbits around potential suitors. [more]

Cool and Groovy at DAC
What's Hot in Design Automation

I have now attended more than half of the 41 annual Design Automation Conferences. One of the things I’ve noticed during those twenty-odd years is that DAC started at the end of the design flow and moved forward. From the days when the hot topics in design automation were replacing tape and glass with Calma systems, the focus of DAC has been subjects closest to silicon. This, in turn, set the tone for the attendees as DAC’s content pushed its way from implementation details at the transistor level toward higher levels of design abstraction.

The difficult thing about levels of abstraction above RTL is that they require a new and more diverse audience. While the semiconductor design flow for almost all implementation fabrics is similar from RTL on and appeals to designers with a common set of skills and expertise, the land above RTL is more varied and domain-specific. DSP designers need a way to go from abstractions such as MATLAB to RTL. Embedded systems designers want to partition C and C++ code into software and hardware threads that can execute on multiple processors and hardware accelerators. There are almost as many vocabularies, design languages, and methodologies as there are application domains. By and large, tools working in these upper-echelons of the design flow would be used by designers that handed off their finished work to DAC attendees.

It is exciting, then, to see higher levels of design abstraction emerge as one of the biggest themes at DAC this year. While RTL has been the standard starting point for DAC’s delights in years past, this year there was a significant trend toward increased abstraction. As FPGAs move toward greater capability and flexibility with the introduction of embedded soft processors and DSP-specific multipliers and MAC blocks, programmable logic may become the gateway to hardware design for a new group of applications developers from diverse backgrounds. This DAC showed that, even if those people don’t come to this particular trade show, their tools will be waiting for them when they arrive. [more]